2023 export record
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conf/norcas/KappesKEFME23 share record
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Johannes Kappes , Robert Kunzelmann , Karsten Emrich , Conrad Foik , Daniel Mueller-Gritschneder , Wolfgang Ecker : Effective Processor Model Generation from Instruction Set Simulator to Hardware Design. NorCAS 2023 : 1-7 share record
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Alban Gruin , Thomas Carle , Christine Rochange , Pascal Sainrat : Validation of Processor Timing Models Using Cycle-Accurate Timing Simulators. WCET 2023 : 2:1-2:12 2022 share record
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Fatma Jebali , Oumaima Matoussi , Arief Wicaksana , Amir Charif , Lilia Zaourar : Decoupling processor and memory hierarchy simulators for efficient design space exploration. DroneSE/RAPIDO@HiPEAC 2022 : 47-52 export record
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journals/corr/abs-2201-08166 share record
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Nazareno Bruschi , Germain Haugou , Giuseppe Tagliavini , Francesco Conti , Luca Benini , Davide Rossi : GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors. CoRR abs/2201.08166 (2022 )2021 export record
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journals/dt/HoseinghorbanAP21 share record
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Ali Hoseinghorban , Mohammad Abbasinia , Ali Paridari , Alireza Ejlali : CATNAP-Sim: A Comprehensive Exploration and a Nonvolatile Processor Simulator for Energy Harvesting Systems. IEEE Des. Test 38 (2 ) : 69-77 (2021 )export record
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journals/remotesensing/CasseABCCDEGMNP21 share record
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Vincent Cassé , Raymond Armante , Philippe Bousquet , Olivier Chomette , Cyril Crevoisier , Thibault Delahaye , Dimitri Edouart , Fabien Gibert , Bruno Millet , Frédéric Nahan , Clémence Pierangelo : Development and Validation of an End-to-End Simulator and Gas Concentration Retrieval Processor Applied to the MERLIN Lidar Mission. Remote. Sens. 13 (14 ) : 2679 (2021 )share record
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Nazareno Bruschi , Germain Haugou , Giuseppe Tagliavini , Francesco Conti , Luca Benini , Davide Rossi : GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors. ICCD 2021 : 409-416 2020 share record
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Daichi Minami , Yukikazu Nakamoto , Yoshitaka Koga , Koji Fukuoka : Simulation environment of embedded control system for multi-core processor with faster CPU simulator. iThings/GreenCom/CPSCom/SmartData/Cybermatics 2020 : 405-410 export record
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conf/simutools/RachujFR20 share record
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Sebastian Rachuj , Dietmar Fey , Marc Reichenbach : Impact of Performance Estimation on Fast Processor Simulators. SimuTools (2) 2020 : 79-93 2019 export record
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journals/corr/abs-1904-06451 share record
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Yuetsu Kodama , Tetsuya Odajima , Akira Asato , Mitsuhisa Sato : Evaluation of the RIKEN Post-K Processor Simulator. CoRR abs/1904.06451 (2019 )2018 share record
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Yann Le Corre , Johann Großschädl , Daniel Dinu : Micro-architectural Power Simulator for Leakage Assessment of Cryptographic Software on ARM Cortex-M3 Processors. COSADE 2018 : 82-98 export record
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conf/iccad/Mueller-Gritschneder18 share record
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Daniel Mueller-Gritschneder , Uzair Sharif , Ulf Schlichtmann : Performance and accuracy in soft-error resilience evaluation using the multi-level processor simulator ETISS-ML. ICCAD 2018 : 127 share record
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Heok June You , Kenwoo Kim , Dongwon Jung : A Real-Time Simulator for Processor-In-the-Loop Simulation of Small Satellites. ICCAIS 2018 : 113-117 2017 export record
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journals/tomacs/MalhotraKGASS17 share record
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Geetika Malhotra , Rajshekar Kalayappan , Seep Goel , Pooja Aggarwal , Abhishek Sagar , Smruti R. Sarangi : ParTejas: A Parallel Simulator for Multicore Processors. ACM Trans. Model. Comput. Simul. 27 (3 ) : 19 (2017 )share record
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Narasinga Rao Miniskar , Raj Narayana Gadde , Young-chul Rams Cho , Sukjin Kim : Fast cycle-accurate compile based simulator for reconfigurable processor. ISCAS 2017 : 1-4 share record
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José Orellana , Carolina Bonacic , Mauricio Marín , Veronica Gil-Costa : Energysim: an energy consumption simulator for web search engine processors. SummerSim 2017 : 18:1-18:12 share record
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Yann Le Corre , Johann Großschädl , Daniel Dinu : Micro-Architectural Power Simulator for Leakage Assessment of Cryptographic Software on ARM Cortex-M3 Processors. IACR Cryptol. ePrint Arch. 2017 : 1253 (2017 )2016 share record
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Shin-Haeng Kang , Donghoon Yoo , Soonhoi Ha : TQSIM: A fast cycle-approximate processor simulator based on QEMU. J. Syst. Archit. 66-67 : 33-47 (2016 )share record
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Yizi Gu , Yongpan Liu , Yiqun Wang , Hehe Li , Huazhong Yang : NVPsim: A simulator for architecture explorations of nonvolatile processors. ASP-DAC 2016 : 147-152 2015 export record
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journals/jcsc/SakthivelMA15 share record
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Erulappan Sakthivel , Veluchamy Malathi , Muruganantham Arunraja : A New Simulator Based on Multi Core Processor with Improved Sense Amplifier. J. Circuits Syst. Comput. 24 (9 ) : 1550141:1-1550141:18 (2015 )share record
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Chang-Chih Chen , Taizhi Liu , Soonyoung Cha , Linda S. Milor : Processor-level reliability simulator for time-dependent gate dielectric breakdown. Microprocess. Microsystems 39 (8 ) : 950-960 (2015 )2014 export record
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conf/icseng/Al-ManasiaC14 share record
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Malik Al-Manasia , Zenon Chaczko : An Overview of Chip Multi-Processors Simulators Technology. ICSEng 2014 : 877-884 export record
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conf/ispass/MalhotraASS14 share record
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Geetika Malhotra , Pooja Aggarwal , Abhishek Sagar , Smruti R. Sarangi : ParTejas: A parallel simulator for multicore processors. ISPASS 2014 : 130-131 2013 export record
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journals/chinaf/LiuJYWSTW13 share record
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Leibo Liu , Wen Jia , Shouyi Yin , Dong Wang , Guanyi Sun , Eugene Tang , Shaojun Wei : ReSSIM: a mixed-level simulator for dynamic coarse-grained reconfigurable processor. Sci. China Inf. Sci. 56 (6 ) : 1-16 (2013 )export record
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journals/ieicet/TawadaYT13 share record
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Masashi Tawada , Masao Yanagisawa , Nozomu Togawa : A High-Speed Trace-Driven Cache Configuration Simulator for Dual-Core Processor L1 Caches. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A (6 ) : 1283-1292 (2013 )export record
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journals/isse/DjukicCOP13 share record
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Miodrag Djukic , Nenad Cetic , Radovan Obradovic , Miroslav Popovic : An approach to instruction set compiled simulator development based on a target processor C compiler back-end design. Innov. Syst. Softw. Eng. 9 (3 ) : 135-145 (2013 )share record
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Bingbing Xia , Fei Qiao , Huazhong Yang , Hui Wang : Design Methodology of the Heterogeneous Multi-core Processor With the Combination of Parallelized Multi-core Simulator and Common Register File-Based Instruction Set Extension Architecture. J. Comput. 8 (2 ) : 356-364 (2013 )2012 share record
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Nachiket Kapre , André DeHon : ${\rm SPICE}2$: Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (1 ) : 9-22 (2012 )2011 share record
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Friedrich Bauer , Joseph Wenninger , Jan Haase , Thomas Fischer : Watching a processor at work: A self-explanatory simulator and illustrator for the MC8 microprocessor. EUROCON 2011 : 1-4 share record
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Zidong Du , Bingbing Xia , Fei Qiao , Huazhong Yang : System-Level Evaluation of Video Processing System Using SimpleScalar-Based Multi-core Processor Simulator. ISADS 2011 : 256-259